SR Flip Flop

In this article, we will go through SR Flip Flop, we will start our article with the definition and construction of the flip-flip, and then we will go through its Basic Block Diagram with its working and characteristic block diagram, at last, we will conclude our article with its applications.

What is SR Flip Flop?

It is a Flip Flop with two inputs, one is S and the other is R. S here stands for Set and R here stands for Reset. Set basically indicates set the flip flop which means output 1 and reset indicates resetting the flip flop which means output 0. Here, a clock pulse is supplied to operate this flip-flop, hence it is a clocked flip-flop.

What is Flip Flop?

Flip-Flop is a term that comes under digital electronics, and it is an electronic component that is used to store one single bit of information.

Since Flip Flop is a sequential circuit so its input is based upon two parameters, one is the current input and other is the output from previous state. It has two outputs, both are complement of each other. It may be in one of two stable states, either 0 or 1.

Prerequisite: Introduction of Sequential Circuits

Construction of SR Flip Flop

We can construct SR flip flop with two ways, one is with 2 NOR Gates + 2 AND Gates and other is with 4 NAND Gates.

SR Flip Flop Construction using 2 NOR + 2 AND Gates:

SR Flip Flop Construction using 4 NAND Gates

Basic Block Diagram of SR Flip Flop

The basic block diagram contains S and R inputs, and between them is clock pulse, Q and Q’ is the complemented outputs.

Working of SR Flip Flop

• Case 1: Let’s say, S=0 and R=0, then output of both AND gates will be 0 and the value of Q and Q’ will be same as their previous value, i.e, Hold state.
• Case 2: Let’s say, S=0 and R=1, then output of both AND gates will be 1 and 0, correspondingly the value of Q will be 0 as one of input is 1 and it is a NOR gate so it will ultimately gives 0, hence Q gets 0 value, similarly Q’ will be 1.
• Case 3: Let’s say, S=1 and R=0, then output of both AND gates will be 0 and 1, correspondingly the value of Q’ will be 0 as one of input to NOR gate is 1, so output will be 0 ultimately and this 0 value will go as input to upper NOR gate, and hence Q will become 1.
• Case 4: Let’s say, S=1 and R=1, then output of both AND gates will be 1 and 1 which is invalid, as the outputs should be complement of each other.

Truth Table of SR Flip Flop

Given Below is the Truth Table of SR Flip Flop

Here, S is the Set input, R is the reset input,Qn+1 is the next state and State tells in which state it enters

Function Table of SR Flip Flop

Given Below is the Function Table of SR Flip Flop

Here, S is the Set input, R is the reset input, Qn is the current state input and Qn+1 is the next state outputs.

Characteristic Equation

• The characteristic equation tells us about what will be the next state of flip flop in terms of present state.
• In order to get the characteristic equation, K-Map is constructed which will be shown as below:

• If we solve the above K-Map then the characteristic equation will be Qn+1 = S + QnR’

Excitation Table

• Excitation Table basically tells about the excitation which is required by flip flop to go from current state to next state.
   

• Here, Qn is the current state, Qn+1 is the next state outputs and S, R are the set and reset inputs respectively.

Applications of SR Flip Flop

There are numerous applications of SR Flip Flop in Digital System, which are listed below:

• Register: SR Flip Flop used to create register. Designer can create any size of register by combining SR Flip Flops.
• Counters: SR Flip Flops used in counters. Counters counts the number of events that occurs in a digital system.
• Memory: SR Flip Flops used to create memory which are used to store data, when the power is turned off.
• Synchronous System: SR Flip Flop are used in synchronous system which are used to synchronize the operation of different component.

Conclusion

In this article we start from the basics of flip flops, that what actually are flip flops and then we discussed about the SR Flip Flops, the two ways in which we can construct SR Flip Flops, it’s Basic Block Diagram, Working of SR Flip Flop, it’s Truth table, Characteristic table, Characteristic equation as well as  Excitation table and in the end we discussed the Applications of SR Flip Flops.

SR Flip Flop – FAQs

What are some common design considerations when working with SR Flip Flops?

To design SR Flip Flop we much consider factors such as setup time, hold time, clock frequency, and power consumption.

How does the clock pulse effect the operation of an SR Flip Flop?

The clock pulse will act as a control signal which will determine the inputs(S and R) which are allowed to effect the flip flop’s output. It will synchronizes as the state transition which will occur only at specific times determined by the clock signal.

What are the key differences between an SR Flip Flop constructed using NOR gates and one constructed using NAND gates?

The main Difference between these logic implementation are SR Flip Flop constructed with NOR gates will work on active-high inputs (S=0, R=0) while the other will work on active-low inputs (S=1, R=1).